adding new model of sensorbox

master
Steffen Pohle 4 years ago
parent ad14dc0428
commit abafaec083

4
.gitignore vendored

@ -1,10 +1,14 @@
.cproject
.project
.settings
gmon.out
*/.depend
server/gmon.out
server/modelbahn-cgi
server/modelbahn-server
server/test-json
z21emu/gmon.out
z21emu/config.h
z21emu/z21emu
*~
*.oo

@ -43,7 +43,7 @@ int Server::Start() {
Server::Server() {
thread = 0;
thread_running = 0;
railways.SetSize(200, 200);
railways.SetSize(64, 32);
status_text = "init server";
mode = SMODE_STARTUP;
data_reset.mr_idx = -1;

@ -1,9 +1,11 @@
function debug (t) {
var pre = document.getElementById("debug");
var pre = document.getElementById("debug");
var div = document.getElementById("debug_div");
if (pre) pre.innerHTML = pre.innerHTML + "<br>" + t;
if (pre) pre.innerHTML = pre.innerHTML + "<br>" + t;
if (div) div.scrollTop = div.scrollHeight;
};

@ -1,13 +1,13 @@
body {
margin: 0px;
font-family: system-ui;
font-family: system-ui;
}
:root {
--top-height: 34px;
--side-width: 37px;
--bottom-height: 2px;
--bottom-height: 100px;
--menu-bg-color: #333;
--menu-fg-color: linen;

@ -281,4 +281,3 @@ int main( void ) {
return 0;
};

@ -0,0 +1,41 @@
# .SILENT:
# Atmega88
# CFLAGS= -Os -g -Wall -mmcu=atmega16 -DF_CPU=8000000UL
# LDFLAGS= -mmcu=atmega16
CPUTYPE1= atmega32
CPUTYPE2= m32
# Atmega32
CFLAGS= -Os -g -Wall -mmcu=$(CPUTYPE1) -DF_CPU=16000000UL
LDFLAGS= -mmcu=$(CPUTYPE1)
all: gleiserkennung-v4.bin
%.o: %.c
avr-gcc $(CFLAGS) -c -o $@ $^
rebuild: clean all
gleiserkennung-v4.elf: gleiserkennung-v4.o eprom.o
avr-gcc $^ -o $@ $(LDFLAGS)
%.bin: %.elf
avr-objcopy -j .text -j .data -O binary $^ $@
clean:
rm *.o -rf
rm *.bin -rf
rm *.elf -rf
rm *~ -rf
cleanall: clean
source: cleanall
upload-v4: gleiserkennung-v4.bin
avrdude -c avrispmkII -P usb -p $(CPUTYPE2) -v -V -U flash:w:gleiserkennung-v4.bin:r

@ -0,0 +1,26 @@
/*
* eprom.c
*
* Created on: 11.02.2018
* Author: steffen
*/
#include "eprom.h"
void EEPROM_write(unsigned int uiAddress, unsigned char ucData) {
while(EECR & (1<<EEWE)); // Wait for completion of previous write
EEAR = uiAddress; // Set up address and data registers
EEDR = ucData;
EECR |= (1<<EEMWE); // Write logical one to EEMWE
EECR |= (1<<EEWE); // Start eeprom write by setting EEWE
}
unsigned char EEPROM_read(unsigned int uiAddress) {
while(EECR & (1<<EEWE)); // Wait for completion of previous write
EEAR = uiAddress; // Set up address register
EECR |= (1<<EERE); // Start eeprom read by writing EERE
return EEDR; // return eeprom data register
}

@ -0,0 +1,18 @@
/*
* eprom.h
*
* Created on: 11.02.2018
* Author: steffen
*/
#ifndef EPROM_H_
#define EPROM_H_
#include <avr/io.h>
#include <avr/interrupt.h>
void EEPROM_write(unsigned int uiAddress, unsigned char ucData);
unsigned char EEPROM_read(unsigned int uiAddress);
#endif /* ATMEGA8_DETECT_EPROM_H_ */

@ -0,0 +1,281 @@
/******************************************************************
* reads some digital inputs and make them readable over i2c bus.
*
* Atmega 32
* +-------+
* S17 (XCK/T0) PB0 -|1 O 40|- PA0 (ADC0) S9
* S18 (T1) PB1 -|2 39|- PA1 (ADC1) S10
* S19 (INT2/AIN0) PB2 -|3 38|- PA2 (ADC2) S11
* S20 (OC0/AIN1) PB3 -|4 37|- PA3 (ADC3) S12
* S21 (SS) PB4 -|5 36|- PA4 (ADC4) S13
* S22 (MOSI) PB5 -|6 35|- PA5 (ADC5) S14
* S23 (MISO) PB6 -|7 34|- PA6 (ADC6) S15
* S24 (SCK) PB7 -|8 33|- PA7 (ADC7) S16
* RESET -|9 32|- AREF
* VCC -|10 31|- GND
* GND -|11 30|- AVCC
* XTAL2 -|12 29|- PC7 (TOSC2)
* XTAL1 -|13 28|- PC6 (TOSC1)
* S1 (RXD) PD0 -|14 27|- PC5 (TDI)
* S2 (TXD) PD1 -|15 26|- PC4 (TDO)
* S3 (INT0) PD2 -|16 25|- PC3 (TMS)
* S4 (INT1) PD3 -|17 24|- PC2 (TCK)
* S5 (OC1B) PD4 -|18 23|- PC1 (DSA) I2C
* S6 (OC1A) PD5 -|19 22|- PC0 (SCL) I2C
* S7 (ICP1) PD6 -|20 21|- PD7 (OC2) S8
* +-------+ */
#include <avr/io.h>
#include <avr/interrupt.h>
#include <stdarg.h>
#include <stdio.h>
#include <util/delay.h>
#include <util/twi.h>
#include "eprom.h"
#define TWCR_ACK TWCR = (1<<TWEN)|(1<<TWIE)|(1<<TWINT)|(1<<TWEA);
#define TWCR_NACK TWCR = (1<<TWEN)|(1<<TWIE)|(1<<TWINT)
#define TWCR_RESET TWCR = (1<<TWEN)|(1<<TWIE)|(1<<TWINT)|(1<<TWEA)|(1<<TWSTO);
#define I2C_NUM_REGS 8
#define I2C_DEFAULT_ADDR 0x2F
#define VERSION 4
#define I2C_SREGS_OFFSET 0x20
enum {
I2C_SREG_VERSION = 0,
I2C_SREG_CMD,
I2C_SREG_ADDR,
I2C_SREG_DIOFFDELAY,
I2C_SREG_MAX
};
enum {
I2C_CMD_NONE = 0,
I2C_CMD_EEPROMREAD,
I2C_CMD_EEPROMWRITE
};
volatile uint8_t i2c_reg;
volatile uint8_t i2c_system[I2C_SREG_MAX];
volatile uint8_t i2c_regs[I2C_NUM_REGS];
//
// i2c slave addresse festlegen und interrupts einschalten
void i2c_slave_init(uint8_t adr) {
int i;
for (i = 0; i < I2C_NUM_REGS; i++) {
i2c_regs[i] = 0;
}
TWAR = adr << 1;
TWCR &= ~(1<<TWSTA) | (1<<TWSTO);
TWCR |= (1<<TWEA) | (1<<TWEN) | (1<<TWIE);
i2c_reg = 0x0;
sei();
}
ISR (TWI_vect) {
char data=0;
switch (TW_STATUS) {
case TW_SR_SLA_ACK: // 0x60 Slave Receiver, Slave wurde adressiert
TWCR_ACK;
i2c_reg=0xFF;
break;
case TW_SR_DATA_ACK: // 0x80 Slave Receiver, ein Datenbyte wurde empfangen
data=TWDR;
if (i2c_reg == 0xFF) {
if(data < I2C_NUM_REGS || (data >= I2C_SREGS_OFFSET && data < I2C_SREGS_OFFSET+I2C_SREG_MAX)) {
i2c_reg = data;
TWCR_ACK;
}
else
TWCR_NACK;
}
else {
if(i2c_reg < I2C_NUM_REGS) {
i2c_regs[i2c_reg] = data;
i2c_reg++;
TWCR_ACK;
}
else if (i2c_reg >= I2C_SREGS_OFFSET && i2c_reg < I2C_SREGS_OFFSET+I2C_SREG_MAX) {
i2c_system[i2c_reg-I2C_SREGS_OFFSET] = data;
i2c_reg++;
TWCR_ACK;
}
else TWCR_NACK;
}
break;
case TW_ST_SLA_ACK: //0xA8 Slave wurde im Lesemodus adressiert und hat ein ACK zurückgegeben.
case TW_ST_DATA_ACK: //0xB8 Slave Transmitter, Daten wurden angefordert
if (i2c_reg == 0xFF) {
i2c_reg = 0;
}
if (i2c_reg < I2C_NUM_REGS) {
TWDR = i2c_regs[i2c_reg];
i2c_reg++;
TWCR_ACK;
}
else if (i2c_reg >= I2C_SREGS_OFFSET && i2c_reg < I2C_SREGS_OFFSET+I2C_SREG_MAX) {
TWDR = i2c_system[i2c_reg-I2C_SREGS_OFFSET];
i2c_reg++;
TWCR_ACK;
}
else TWCR_NACK;
break;
case TW_SR_STOP:
TWCR_ACK;
break;
case TW_ST_DATA_NACK: // 0xC0 Keine Daten mehr gefordert
case TW_SR_DATA_NACK: // 0x88
case TW_ST_LAST_DATA: // 0xC8 Last data byte in TWDR has been transmitted (TWEA = “0”); ACK has been received
default:
TWCR_RESET;
break;
}
}
/////////////////////////////////////////////////////////////////////////
//
int main( void ) {
uint32_t cnt[32] = { 0 };
unsigned int i;
uint32_t inval = 0;
uint32_t temp = 0;
int offdelay;
//
// disable JTAG
MCUCSR |= (1<<JTD);
MCUCSR |= (1<<JTD);
// enable inputs
DDRA = 0;
PORTA = 0xFF;
DDRB = 0;
PORTB = 0xFF;
DDRC = 0;
PORTC = 0xFF;
DDRD = 0;
PORTD = 0xFF;
//
// read all variables from eeprom
i2c_system[I2C_SREG_VERSION] = VERSION;
i2c_system[I2C_SREG_CMD] = 0;
i2c_system[I2C_SREG_ADDR] = EEPROM_read(I2C_SREG_ADDR);
if (i2c_system[I2C_SREG_ADDR] > 0x4f || i2c_system[I2C_SREG_ADDR] < 0x20) {
i2c_system[I2C_SREG_ADDR] = I2C_DEFAULT_ADDR;
}
i2c_system[I2C_SREG_DIOFFDELAY] = EEPROM_read(I2C_SREG_DIOFFDELAY);
if (i2c_system[I2C_SREG_DIOFFDELAY] == 0 || i2c_system[I2C_SREG_DIOFFDELAY] == 0xFF) {
i2c_system[I2C_SREG_DIOFFDELAY] = 0x20;
}
i2c_slave_init (i2c_system[I2C_SREG_ADDR]);
for (i = 0; i < 32; i++) cnt[i] = 0;
//
// system loop
while( 1 ) {
//
// digital in registers..
offdelay = i2c_system[I2C_SREG_DIOFFDELAY] << 8;
// S1 - S8
i = 0; if (!(PINC & (1 << 0))) cnt[i] = offdelay;
i++; if (!(PINC & (1 << 1))) cnt[i] = offdelay;
i++; if (!(PINC & (1 << 2))) cnt[i] = offdelay;
i++; if (!(PINC & (1 << 3))) cnt[i] = offdelay;
i++; if (!(PINC & (1 << 4))) cnt[i] = offdelay;
i++; if (!(PINC & (1 << 5))) cnt[i] = offdelay;
i++; if (!(PINC & (1 << 6))) cnt[i] = offdelay;
i++; if (!(PINC & (1 << 7))) cnt[i] = offdelay;
// S9 - S16
i++; if (!(PINA & (1 << 0))) cnt[i] = offdelay;
i++; if (!(PINA & (1 << 1))) cnt[i] = offdelay;
i++; if (!(PINA & (1 << 2))) cnt[i] = offdelay;
i++; if (!(PINA & (1 << 3))) cnt[i] = offdelay;
i++; if (!(PINA & (1 << 4))) cnt[i] = offdelay;
i++; if (!(PINA & (1 << 5))) cnt[i] = offdelay;
i++; if (!(PINA & (1 << 6))) cnt[i] = offdelay;
i++; if (!(PINA & (1 << 7))) cnt[i] = offdelay;
// S17 - S24
i++; if (!(PIND & (1 << 0))) cnt[i] = offdelay;
i++; if (!(PIND & (1 << 1))) cnt[i] = offdelay;
i++; if (!(PIND & (1 << 2))) cnt[i] = offdelay;
i++; if (!(PIND & (1 << 3))) cnt[i] = offdelay;
i++; if (!(PIND & (1 << 4))) cnt[i] = offdelay;
i++; if (!(PIND & (1 << 5))) cnt[i] = offdelay;
i++; if (!(PIND & (1 << 6))) cnt[i] = offdelay;
i++; if (!(PIND & (1 << 7))) cnt[i] = offdelay;
// all values
for (i = 0; i < 16; i++) {
if (cnt[i] == 0) inval &= ~(1 << (i));
else {
cnt[i]--;
inval |= (1 << (i));
}
}
for (i = 0; i < 16; i++) {
if (cnt[16+i] == 0) temp &= ~(1 << (i));
else {
cnt[16+i]--;
temp |= (1 << (i));
}
}
i2c_regs[0] = (unsigned char) (inval & 0x000000FF);
i2c_regs[1] = (unsigned char) ((inval & 0x0000FF00) >> 8);
i2c_regs[2] = (unsigned char) (temp & 0x000000FF);
i2c_regs[3] = (unsigned char) ((temp & 0x0000FF00) >> 8);
//
// system registers
if (i2c_system[I2C_SREG_CMD] != 0) {
if (i2c_system[I2C_SREG_CMD] == I2C_CMD_EEPROMREAD) {
cli();
i2c_system[I2C_SREG_CMD] = 0;
for (i = 0; i < I2C_SREG_MAX; i++) {
i2c_system[i] = EEPROM_read(i);
}
sei();
}
if (i2c_system[I2C_SREG_CMD] == I2C_CMD_EEPROMWRITE) {
cli();
i2c_system[I2C_SREG_CMD] = 0;
for (i = 0; i < I2C_SREG_MAX; i++) {
EEPROM_write(i, i2c_system[i]);
}
sei();
}
}
i2c_system[I2C_SREG_CMD] = 0;
}
return 0;
};

@ -1,14 +0,0 @@
#ifndef _CONFIG_H_
#define _CONFIG_H_
#define VERSION "0.1"
#define PREFIX "/usr/local"
#define RUNPID "/var/run/z21Emulation.pid"
#define DATAPREFIX "/var/lib"
#define ETCPREFIX "/etc"
#define DEFAULT_Z21PORT 21104
#endif

@ -141,7 +141,7 @@ void i2cscan(I2C *i2c) {
docnt++;
}
}
else if (ver == 3) {
else if (ver == 3 || ver == 4) {
if (dicnt < RBUS_MAXSENSORBYTES) {
rbus[dicnt].i2c_addr = addr;
rbus[dicnt].i2c_reg = 0x0;
@ -194,7 +194,6 @@ int i2ccfgload(const char *fname) {
FILE *f;
char buf[1024];
char *pos;
int tmp;
int index = -1;
int type;
int addr;

Loading…
Cancel
Save